DocumentCode
439783
Title
A CMOS analog parallel array processor chip with programmable dynamics for early vision tasks
Author
Carmona, R. ; Jiménez-Garrido, F. ; Domínguez-Castro, R. ; Espejo, S. ; Rodríguez-Vázquez, A.
Author_Institution
Instituto de Microelectrónica de Sevilla, Sevilla, Spain
fYear
2002
fDate
24-26 Sept. 2002
Firstpage
371
Lastpage
374
Abstract
A bio-inspired model for an analog programmable array processor (APAP), based on studies on the vertebrate retina, has permitted the realization of complex programmable spatio-temporal dynamics in VLSI. This model mimics the way in which images are processed in the visual pathway what renders a feasible alternative for the implementation of early vision tasks in standard technologies. As a result, a prototype chip, designed and fabricated in 0.5µm CMOS, renders a computing power per area and power consumption that is amongst the highest reported for a single chip. Design challenges, trade-offs and some functional tests results are presented in this paper.
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
Conference_Location
Florence, Italy
Type
conf
Filename
1471542
Link To Document