LNA design for a fully integrated CMOS single chip UMTS transceiver

This work presents the design of low noise amplifiers (LNA) for a single chip fully integrated dual mode FDD/TDD UMTS transceiver in standard 0.25µm CMOS. Circuit designs for both first and second stage LNA for the Zero-IF transceiver are presented. To minimize crosstalk risks, a minimal area feedback topology without any coil was preferred at the cost of a higher power consumption. The first stage FDD mode design consumes 19.7mA from a 2.5V supply for a gain of 14dB in a 50Ω system. Noise figure (@50Ω) is 2.1dB, 1dB- compression point is -13dBm. The second stage FDD design operates at differential 200Ω input impedance and consumes 7.5mA from a 2.5V supply for a voltage gain of 14dB. Its Noise figure (@50Ω) is 3dB and compression point is -14dBm. Furthermore, all differential LNA´s are gain switchable to -5dB.