A 0.13um CMOS Technology for Low-Voltage Analogue Applications

Author

Ponomarev, Y.V. ; Stolk, P.A. ; van Brandenburg, A. ; Dachs, C.J.J. ; Kaiser, M. ; Montree, A.H. ; Roes, R. ; Schmitz, J. ; Woerlee, P.H.

Author_Institution

Philips Research Laboratories, Eindhoven, The Netherlands

Volume

fYear

1999

fDate

13-15 Sept. 1999

Firstpage

180

Lastpage

183

Keywords

Annealing; CMOS process; CMOS technology; Lithography; MOSFET circuits; Parasitic capacitance; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference, 1999. Proceeding of the 29th European

Conference_Location

Leuven, Belgium

Print_ISBN

2-86332-245-1

Type

Filename

1505469

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