• DocumentCode
    443201
  • Title

    A 15-bit 30 MS/s 145 mW three-step ADC for imaging applications

  • Author

    Van der Ploeg, Hendrik ; Vertregt, Maarten ; Lammers, Marco

  • Author_Institution
    Philips Res., Eindhoven, Netherlands
  • fYear
    2005
  • fDate
    12-16 Sept. 2005
  • Firstpage
    161
  • Lastpage
    164
  • Abstract
    A 15-bit 30 MS/s three-step ADC for imaging applications is presented with a peak-to-peak signal to rms noise ratio of 84 dB. The offsets of the residue amplifiers are independently background calibrated. The ADC is realized in single poly, 0.18 μm CMOS, measures 1.4 mm2 and dissipates 145 mW from 1.8 V and 3.3 V supplies.
  • Keywords
    CMOS integrated circuits; amplifiers; analogue-digital conversion; image processing; low-power electronics; mixed analogue-digital integrated circuits; 0.18 micron; 1.8 V; 145 mW; 15 bit; 3.3 V; CMOS technology; imaging applications; residue amplifiers; three step ADC; Charge coupled devices; Digital signal processing; Dynamic range; Energy consumption; Image converters; Matrix converters; Quantization; Signal processing; Signal to noise ratio; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2005. ESSCIRC 2005. Proceedings of the 31st European
  • Print_ISBN
    0-7803-9205-1
  • Type

    conf

  • DOI
    10.1109/ESSCIR.2005.1541584
  • Filename
    1541584
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=443201