DocumentCode
445383
Title
Semiconductor nanowires as a novel electronic materials technology for future electronic devices
Author
Samuelson, L.
Volume
1
fYear
2005
fDate
20-22 June 2005
Firstpage
245
Lastpage
245
Abstract
Summary form only given, as follows. Extreme down-scaling of nanoelectronic devices by top-down fabrication methods may be hindered by several obstacles, such as the cost for patterning and processing, or inferior device performance due to process-induced damage. In this presentation I will present a bottom-up approach for nanometer-scale device abrication, based on seeded growth of semiconductor nanowires, using a method traditionally described as vapor-liquid-solid (VLS) growth. I will try to summarize how this approach has, in just 3-4 years, moved the technology from quite poorly controlled sprouting of nanowires without real control of dimensions or location, to a much more mature technology by which positioning and dimensions of nanowires as monolithic extensions of the substrate wafer are tightly controlled, and with the ability to create atomically abrupt and complex heterostructure devices, enabling devices such as resonant-tunneling diodes and singleelectron transistors to be created.
Keywords
FETs; Fabrication; Gallium arsenide; Materials science and technology; Nanoscale devices; Nanostructures; Nanowires; Resonant tunneling devices; Silicon; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference Digest, 2005. DRC '05. 63rd
Conference_Location
Santa Barbara, CA
Print_ISBN
0-7803-9040-7
Type
conf
DOI
10.1109/DRC.2005.1553141
Filename
1553141
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