• DocumentCode
    445387
  • Title

    Planar tunneling-coupled field-effect transistor for low-power mixed-signal applications

  • Author

    Moon, J.S. ; Wang, K.C. ; Rajavel, R. ; Bui, S. ; Wong, D. ; Chow, D. ; Jenson, J.

  • Author_Institution
    LLC, Malibu, CA
  • Volume
    1
  • fYear
    2005
  • fDate
    22-22 June 2005
  • Firstpage
    261
  • Lastpage
    262
  • Abstract
    In this paper, we report a prototype demonstration of room-temperature resonant tunneling-coupled transistors in FET layout (TCT), in which tunneling characteristics such as negative differential resistance (NDR) and peak current are directly controlled by surface Schottky gate with high gain and transconductance. Functionality of the device can also be switched between FET mode and tunneling transistor mode. The fabrication process is fully compatible with conventional FET processes, offering a fully integrable and scalable tunneling transistor technology. Prototype planar TCTs were fabricated with resonantly-coupled dual-channel InAlAs/InGaAs/InP HEMT heterostructures by providing independent electrical contacts to each channel. The current-voltage characteristics are determined by an interwell and intersubband tunneling. The fabrication process was done using an I-line Cannon stepper on full 3-inch wafers with implanted back-gates defined prior to MBE growth of closely-coupled dual-channel HEMT layers. The highest mobility of the closely-coupled dual-channel HEMT layers observed so far is 9600 cmWs at room temperature
  • Keywords
    III-V semiconductors; Schottky barriers; aluminium compounds; gallium arsenide; high electron mobility transistors; indium compounds; low-power electronics; mixed analogue-digital integrated circuits; resonant tunnelling; 3 in; HEMT heterostructures; I-line Cannon stepper; InAlAs-InGaAs-InP; MBE growth; electrical contacts; field effect transistor; intersubband tunneling; interwell tunneling; low-power mixed-signal applications; negative differential resistance; surface Schottky gate; tunneling transistor technology; FETs; Fabrication; HEMTs; Indium compounds; Indium gallium arsenide; Prototypes; Resonance; Resonant tunneling devices; Surface resistance; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference Digest, 2005. DRC '05. 63rd
  • Conference_Location
    Santa Barbara, CA
  • Print_ISBN
    0-7803-9040-7
  • Type

    conf

  • DOI
    10.1109/DRC.2005.1553148
  • Filename
    1553148