Title :
A 100dB+ SFDR 80MSPS 14 bit 0.35μm BiCMOS pipeline ADC
Author :
Bardsley, Scott ; Dillon, Christopher ; Kummaraguntla, Ravi ; Lane, Chuck ; Ali, Ahmed ; Rigsbee, Baeton ; Combs, Darren
Author_Institution :
High Speed Converter Group, Analog Devices, Greensboro, NC, USA
Abstract :
The cellular infrastructure market requires high clock rate, high dynamic range ADCs to enable efficient, advanced architecture receive channels. This paper describes a 14 bit 80MSPS ADC with 100dB+ SFDR at baseband in 0.35μm BiCMOS technology using 1.1 watts on a 3.3V/5.0V dual supply. Some challenges associated with high spurious free dynamic range at high clock rates will be discussed along with methods used in this ADC to overcome these barriers.
Keywords :
BiCMOS integrated circuits; analogue-digital conversion; comparators (circuits); pipeline arithmetic; 0.35 micron; 1.1 W; 14 bit; 3.3 V; 5 V; BiCMOS technology; boot strap; cellular infrastructure market; comparator; pipeline analog-digital converter; receive channels; spurious free dynamic range; BiCMOS integrated circuits; Capacitors; Clocks; Dynamic range; Linearity; MOS devices; Pipelines; Switches; Switching circuits; Voltage;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 2005. Proceedings of the
Print_ISBN :
0-7803-9309-0
DOI :
10.1109/BIPOL.2005.1555219
