Title :
An 8-Bit, 20 MSPS pipelined ADC
Author :
Wagdy, Mahmoud Fawzy ; Liu, Zuliang
Author_Institution :
Dept. of Electr. Eng., California State Univ., Long Beach, CA
Abstract :
This paper presents the design and simulation of an 8-bit, 20 mega-sample per second (MSPS), multi-bits per stage, pipelined analog-to-digital converter (ADC). By using 0.18 mum standard CMOS process, the design can be embedded with digital circuits in system-on-chip (SOC). The ADC´s architecture, circuits of individual components and simulation results are presented
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; integrated circuit design; 0.18 micron; 8 bit; CMOS process; pipelined analog-digital converter; system on chip; CMOS process; CMOS technology; Circuit simulation; Clocks; Delay; Digital circuits; Sampling methods; System-on-a-chip; Throughput; Timing;
Conference_Titel :
Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
Conference_Location :
Cairo
Print_ISBN :
0-7803-8294-3
DOI :
10.1109/MWSCAS.2003.1562245
