DocumentCode
446847
Title
DCD --- Disk Caching Disk: A New Approach for Boosting I/O Performance
Author
Yang, Qing ; Hu, Yiming
fYear
1996
fDate
22-24 May 1996
Firstpage
169
Lastpage
169
Abstract
This paper presents a novel disk storage architecture called DCD, Disk Caching Disk, for the purpose of optimizing I/O performance. The main idea of the DCD is to use a small log disk, referred to as cache-disk, as a secondary disk cache to optimize write performance. While the cache-disk and the normal data disk have the same physical properties, the access speed of the former differs dramatically from the latter because of different data units and different ways in which data are accessed. Our objective is to exploit this speed difference by using the log disk as a cache to build a reliable and smooth disk hierarchy. A small RAM buffer is used to collect small write requests to form a log which is transferred onto the cache-disk whenever the cache-disk is idle. Because of the temporal locality that exists in office/engineering work-load environments, the DCD system shows write performance close to the same size RAM (i.e. solid-state disk) for the cost of a disk. Moreover, the cache-disk can also be implemented as a logical disk in which case a small portion of the normal data disk is used as the log disk. Trace-driven simulation experiments are carried out to evaluate the performance of the proposed disk architecture. Under the office/engineering work-load environment, the DCD shows superb disk performance for writes as compared to existing disk systems. Performance improvements of up to two orders of magnitude are observed in terms of average response time for write operations. Furthermore, DCD is very reliable and works at the device or device driver level. As a result, it can be applied directly to current file systems without the need of changing the operating system.
Keywords
2-level adaptive prediction; branch prediction; correlation; system traces; Boosting; Computer architecture; Costs; Electronic mail; File systems; Operating systems; Permission; Read-write memory; Reliability engineering; Solid state circuits; 2-level adaptive prediction; branch prediction; correlation; system traces;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture, 1996 23rd Annual International Symposium on
ISSN
1063-6897
Print_ISBN
0-89791-786-3
Type
conf
DOI
10.1109/ISCA.1996.10021
Filename
1563045
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