DocumentCode :
449471
Title :
Reduced latency iterative decoding of LDPC codes
Author :
Wang, Yige ; Zhang, Juntan ; Fossorier, Marc ; Yedidia, Jonathan S.
Author_Institution :
Dept. of Electr. Eng., Hawaii Univ., Honolulu, HI, USA
Volume :
3
fYear :
2005
fDate :
2005
Abstract :
Reduced latency versions of iterative decoders of low-density parity-check codes are analyzed in this paper. The proposed schemes converge faster than standard approaches. Two methods, density evolution and EXIT charts, are used to analyze the performance of the proposed algorithms. Both theoretical analysis and simulations show that the new schedules offer good performance versus complexity and latency trade-offs.
Keywords :
iterative decoding; parity check codes; EXIT charts; density evolution; latency iterative decoding; low-density parity check codes; Algorithm design and analysis; Analytical models; Bipartite graph; Convergence; Delay; Iterative algorithms; Iterative decoding; Laboratories; Parity check codes; Performance analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Global Telecommunications Conference, 2005. GLOBECOM '05. IEEE
Conference_Location :
St. Louis, MO, USA
Print_ISBN :
0-7803-9414-3
Type :
conf
DOI :
10.1109/GLOCOM.2005.1577843
Filename :
1577843
Link To Document :
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