DocumentCode
45042
Title
Investigation of Key Technologies for Poly-Si/TaN/HfLaON/IL 
Gate-Stacks in Advanced Device Applications
Author
Qiuxia Xu ; Gaobo Xu ; Yongliang Li ; Huajie Zhou ; Junfeng Li ; Jiebin Niu ; Mingzheng Ding ; Dapeng Chen ; Tianchun Ye
Author_Institution
Inst. of Microelectron., Beijing, China
Volume
61
Issue
4
fYear
2014
fDate
Apr-14
Firstpage
991
Lastpage
997
Abstract
We demonstrated for the first time integration of a poly-Si/TaN/HfLaON/IL SiO2 gate-stacks into high-performance sub-30-nm nMOSFETs using a gate-first process flow successfully. The properties of TaN/HfLaON/IL SiO2 gate-stacks were studied. The results showed that the HfLaON gate dielectric material exhibited excellent thermal stability and electrical characteristics. A three-step dry etching method used to etch poly-Si/TaN/HfLaON/IL SiO2 gate-stack was proposed to provide an effective pathway for patterning the complex gate-stacks. At VDS=VGS=0.9 V, the drive current ION of 410 μA/μm was achieved at an OFF-state leakage current IOFF of 180 nA/μm. The threshold voltage of saturation extracted at IDS of 3 μA/μm was 0.14 V. The subthreshold slope of 92 mV/decade and drain induced barrier lowering of 93 mV/V were obtained.
Keywords
MOSFET; dielectric materials; elemental semiconductors; etching; high-k dielectric thin films; lanthanum compounds; silicon; silicon compounds; tantalum compounds; thermal stability; OFF-state leakage current; Si-TaN-HfLaON-SiO2; electrical characteristics; gate dielectric material; gate-first process flow; gate-stack patterning; high-performance nMOSFETs; interfacial layer; thermal stability; three-step dry etching method; voltage 0.14 V; voltage 0.9 V; Dielectrics; Dry etching; Logic gates; MOSFET; Metals; Silicon; Band-edge work function; HfLaON dielectric; TaN metal gate (MG); dry etching of gate-stack; nMOSFETs;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2014.2309145
Filename
6776540
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