DocumentCode :
450499
Title :
Strip Layout: A New Layout Methodology for Standard Circuit Modules
Author :
Apte, Jitendra ; Kedem, Gershon
Author_Institution :
Computer Science Department, Duke University, Durham, NC
fYear :
1987
fDate :
28-1 June 1987
Firstpage :
363
Lastpage :
369
Abstract :
In this paper we describe Strip Layout, a new layout methodology that is suitable for automatically laying out standard circuit modules and for automatic module generation from transistor net-list. We demonstrate that the new layout methodology yields circuits that are denser than standard cell layout while retaining all the advantages of standard cells. Moreover, Strip Layout could be generated by simple algorithms at high speed.
Keywords :
Automatic logic units; Automatic testing; Circuits; Computer science; High level languages; Permission; Robustness; Routing; Silicon compiler; Strips;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1987. 24th Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0781-5
Type :
conf
DOI :
10.1109/DAC.1987.203269
Filename :
1586253
Link To Document :
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