• DocumentCode
    450699
  • Title

    A Massively Parallel Algorithm for Fault Simulation on the Connection Machine

  • Author

    Narayanan, Vinod ; Pitchumani, Vijay

  • Author_Institution
    ECE Department, Syracuse University, Syracuse, NY
  • fYear
    1989
  • fDate
    25-29 June 1989
  • Firstpage
    734
  • Lastpage
    737
  • Abstract
    A massively parallel algorithm for fault simulation on the Connection Machine is presented. This algorithm achieves two to three orders of magnitude speedup over the one presented in [1]. The fault simulation methodology used here is a combination of parallel fault simulation [2] and PPSFP [3]. Simulation rates of over 2.7 billion gate evaluations per second have been achieved.
  • Keywords
    Broadcasting; Circuit faults; Circuit simulation; Distributed computing; Logic testing; Microcontrollers; Parallel algorithms; Parallel architectures; Permission; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1989. 26th Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-89791-310-8
  • Type

    conf

  • DOI
    10.1109/DAC.1989.203498
  • Filename
    1586482
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=450699