An integrated front-end readout and feature extraction system for the BaBar drift chamber

The BaBar experiment has been operating at SLAC´s PEP-II asymmetric B-factory since 1999. The accelerator has achieved more than three times its original design luminosity of 3×10³³ cm^-2s^-1, with plans for an additional factor of three in the next two years. To meet the experiment´s performance requirements in the face of significantly higher trigger and background rates, the drift chamber´s front-end readout system has been redesigned around the Xilinx Spartan 3 FPGA. The new system implements analysis and feature-extraction of digitized waveforms in the front-end, reducing the data bandwidth required by a factor of four.