Title :
Synthesis of Pipelined Instruction Set Processors
Author :
Cloutier, Richard J. ; Thomas, Donald E.
Author_Institution :
Dept. of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA
Abstract :
This paper presents the Snapshot Method, a technique that fills a void in existing synthesis systems by considering inter-instruction data dependencies while defining a pipeline structure. These dependencies can make it impossible to overlap the execution of some sequences of instructions thus the detection and resolution of such sequences is an important contribution of this work. Experimental results for a design of the IBM ROMP architecture are presented.
Keywords :
Assembly; Data engineering; Delay; Design methodology; Design optimization; Hardware; High level synthesis; Pipeline processing; Processor scheduling; Throughput;
Conference_Titel :
Design Automation, 1993. 30th Conference on
Print_ISBN :
0-89791-577-1
DOI :
10.1109/DAC.1993.204014
