DocumentCode
452004
Title
Memory Estimation for High Level Synthesis
Author
Verbauwhede, Ingrid M. ; Scheers, Chris J. ; Rabaey, Jan M.
Author_Institution
EECS Department, University of California at Berkeley, Berkeley CA
fYear
1994
fDate
6-10 June 1994
Firstpage
143
Lastpage
148
Abstract
This paper describes a new memory estimation technique for DSP applications written in an applicative language. Since no concept of storage is present in an applicative language, the compiler has to derive the memory needs. For each array, the number of storage locations is estimated by modelling both, the dependencies and the sequence of execution. For this, an arrayspecific production time axis is created and the current production date is compared with the production date of the consumed signal. It is formulated as an integer linear problem.
Keywords
Computer applications; Data analysis; Data flow computing; Delay estimation; Digital signal processing; High level synthesis; Production; Real time systems; Sampled data systems; Signal analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1994. 31st Conference on
ISSN
0738-100X
Print_ISBN
0-89791-653-0
Type
conf
DOI
10.1109/DAC.1994.204087
Filename
1600360
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