DocumentCode
453126
Title
High linearity SPDT switch for dual band wireless LAN applications
Author
Lee, Kang-Ho ; Jin, Zhejun ; Koo, Kyung-Heon
Author_Institution
Dept. of Electron. Eng., Incheon Univ., South Korea
Volume
2
fYear
2005
fDate
4-7 Dec. 2005
Abstract
This paper presents a high linear and power-handling single-pole double-throw (SPDT) switch for WLAN 802.11 a/b/g applications. The switch circuit has asymmetric and stacked topology to have high power-handling and linearity for the Tx path. This SPDT switch has been implemented with 0.25 μm GaAs pHEMT process by ETRI. The designed SPDT switch has the measured insertion loss of better than 1dB and isolation of better than 40dB for the Tx path and 25dB for the Rx path and the high power handling capability with P1dB of about 23dBm with control voltage of -3/0 V. The fabricated SPDT switch chip size is 1.8 mm × 1.8 mm.
Keywords
HEMT integrated circuits; III-V semiconductors; MMIC; gallium arsenide; microwave switches; wireless LAN; 0.25 micron; 1.8 mm; GaAs; MMIC; Rx path; Tx path; WLAN 802.11 a/b/g applications; asymmetric topology; dual band wireless LAN applications; high linearity SPDT switch; insertion loss; pHEMT process; single-pole double-throw; stacked topology; switch circuit; Circuit topology; Dual band; Gallium arsenide; Linearity; Loss measurement; PHEMTs; Power measurement; Switches; Switching circuits; Wireless LAN; MMIC; SPDT; pHEMT; switch;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference Proceedings, 2005. APMC 2005. Asia-Pacific Conference Proceedings
Print_ISBN
0-7803-9433-X
Type
conf
DOI
10.1109/APMC.2005.1606461
Filename
1606461
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