DocumentCode
453168
Title
Modeling of flip-chip interconnects using novel neural network approaches
Author
Hwangbo, Hoon ; Lee, Jaehoon ; Nah, Wansoo ; Joo, Jinho ; Jung, Seung-Boo
Author_Institution
Sch. of Electr. & Comput. Eng., Sungkyunkwan Univ., Suwon, South Korea
Volume
2
fYear
2005
fDate
4-7 Dec. 2005
Abstract
In this paper, we present an efficient neural network approach to analyze the bump structure of flip-chip transitions. 3D FEM simulations are used to extract the network parameters such as S-parameters and then the equivalent lumped circuit model is used to extract L-C and R. Validation of the equivalent circuit model is conducted by the comparison between the circuit simulation and the full wave simulation. Using the extracted data, training sets of the neural networks are composed. The proposed neural network, in which all L-C and R parameters are used simultaneously at the one output layer, shows nice prediction performance for the S-parameter characteristics.
Keywords
S-parameters; circuit simulation; equivalent circuits; finite element analysis; flip-chip devices; integrated circuit interconnections; lumped parameter networks; neural nets; 3D FEM simulations; L-C parameters; R parameters; S-parameters; circuit simulation; equivalent lumped circuit model; flip-chip interconnect modeling; full wave simulation; neural network approach; Analytical models; Circuit simulation; Coplanar waveguides; Data mining; Equivalent circuits; Integrated circuit interconnections; Matrix converters; Neural networks; Scattering parameters; Shape;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference Proceedings, 2005. APMC 2005. Asia-Pacific Conference Proceedings
Print_ISBN
0-7803-9433-X
Type
conf
DOI
10.1109/APMC.2005.1606521
Filename
1606521
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