DocumentCode
453608
Title
CMOS RF receiver: from system architecture to circuit implementation
Author
Zhang, Pengfei
Author_Institution
Beken Corp., Shanghai
Volume
1
fYear
2005
fDate
24-0 Oct. 2005
Firstpage
1157
Lastpage
1162
Abstract
RF-CMOS is considered more favorable primarily for the following two reasons: Firstly, capitalizing on the fabrication maturity and manufacture volume, one would justifiably expect the lowest possible cost. Secondly, it has undoubtedly the best potential for wireless system-on-chip (SOC) for its seamless compatibility with digital baseband circuit fabrication process. This paper reviewed system architectures of receiver design with emphasis on suitability of CMOS implementation. Circuit design issues for various building blocks in a typical receiver have been discussed. Finally, a design example of a 5-GHz receiver for WLAN application has been demonstrated
Keywords
CMOS digital integrated circuits; field effect MMIC; microwave receivers; radio receivers; system-on-chip; wireless LAN; 5 GHz; CMOS RF receiver; CMOS implementation; SOC; WLAN application; circuit design; circuit implementation; digital baseband circuit fabrication process; system architecture; wireless system-on-chip; Background noise; Bandwidth; Circuits; Costs; Noise figure; Noise level; Radio frequency; Receivers; Signal to noise ratio; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2005. ASICON 2005. 6th International Conference On
Conference_Location
Shanghai
Print_ISBN
0-7803-9210-8
Type
conf
DOI
10.1109/ICASIC.2005.1611238
Filename
1611238
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