A hardware architecture of MIMO-OFDM synchronizer

In this paper, a hardware architecture for MIMO-OFDM system synchronizer is presented. The proposed synchronization unit can achieve synchronization in the time-domain and frequency-domain. The time-domain synchronization can be achieved by a group of matched filters of ZCZ codes. Since MIMO-OFDM system have multiple transmitting antennas and multiple receiving antennas, every receiving antenna can receive the signal from all transmitting antennas. When the all sub-channels delay between receiving/transmitting antennas are different, every frame detection in receiving antennas is interfered from other transmitting preamble, the proposed matched filter of ZCZ code can solve the problem. On the other hand the synchronizer unit also perform the frequency offset estimation and correction with two long training symbol in the preamble. At last,the hardware architecture of synchronizer is given and implemented with EP20K1500E device of Altera´s APEX DSP development board.