A practical method to estimate interconnect responses to variabilities

Author

Liu, F.

Author_Institution

IBM Austin Res. Lab, TX

Volume

1

fYear

2006

fDate

6-10 March 2006

Abstract

Variabilities in metal interconnect structures can affect circuit timing performance or even cause function failure in VLSI designs. This paper proposes a method to estimate the difference between the nominal and perturbed circuit waveforms by calculating the moments in frequency-domain via efficient iterative method. The algorithm can be used to accurately reproduce the differential waveforms, or to provide efficient early estimates on the timing impact of the variabilities for RC networks

Keywords

RC circuits; circuit analysis computing; integrated circuit interconnections; integrated circuit modelling; iterative methods; method of moments; reduced order systems; timing; waveform analysis; RC networks; VLSI designs; circuit timing; circuit variabilities; function failure; interconnect responses; iterative method; metal interconnect structures; nominal circuit waveform; perturbed circuit waveforms; timing impact; Algorithm design and analysis; Differential equations; Frequency estimation; Integrated circuit interconnections; Iterative algorithms; Iterative methods; Reduced order systems; Taylor series; Timing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe, 2006. DATE '06. Proceedings

Conference_Location

Munich

Print_ISBN

3-9810801-1-4

Type

conf

DOI

10.1109/DATE.2006.243893

Filename

1656941