DocumentCode
454424
Title
Adaptive Data Placement in an Embedded Multiprocessor Thread Library
Author
Stanley-Marbell, Phillip ; Lahiri, Kanishka ; Raghunathan, Anand
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA
Volume
1
fYear
2006
fDate
6-10 March 2006
Firstpage
1
Lastpage
2
Abstract
Embedded multiprocessors pose new challenges in the design and implementation of embedded software. This has led to the need for programming interfaces that expose the capabilities of the underlying hardware. In addition, for systems that implement applications consisting of multiple concurrent threads of computation, the optimized management of inter-thread communication is crucial for realizing high-performance. This paper presents the design of an application-adaptive thread library that conforms to the IEEE POSIX 1003.1c threading standard (Pthreads). The library adapts the placement of both explicitly marked application data objects, as well as implicitly created data objects, in a physically distributed on-chip memory architecture, based on the application´s data access characteristics
Keywords
application program interfaces; distributed memory systems; embedded systems; memory architecture; IEEE POSIX 1003.1c threading standard; adaptive data placement; application-adaptive thread library; distributed on-chip memory architecture; embedded multiprocessors; embedded software; interthread communication; programming interfaces; Central Processing Unit; Cryptography; Cyclic redundancy check; Data structures; Memory architecture; National electric code; Random access memory; Software libraries; Wireless LAN; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location
Munich
Print_ISBN
3-9810801-1-4
Type
conf
DOI
10.1109/DATE.2006.244065
Filename
1656977
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