• DocumentCode
    454465
  • Title

    Exploiting Data-Dependent Slack Using Dynamic Multi-VDD to Minimize Energy Consumption in Datapath Circuits

  • Author

    Gandhi, Kaushal R. ; Mahapatra, Nihar R.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI
  • Volume
    1
  • fYear
    2006
  • fDate
    6-10 March 2006
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Modern microprocessors feature wide datapaths to support large on-chip memory and to enable computation on large-magnitude operands. With device scaling and rising clock frequencies, energy consumption and power density have become critical concerns, especially in datapath circuits. Datapaths are typically designed to optimize delay for worst-case operands. However, such operands rarely occur; the most frequently occurring input operand words (comprising long strings or subwords of 0\´s and 1\´s) present two major opportunities for energy optimization: (1) avoiding unnecessary computation involving such "special" input operand subword values and (2) exploiting timing slack in circuits (designed to accommodate worst-case inputs) arising due to such values. Previous techniques have exploited only one or the other of these factors, but not both simultaneously. Our new technique, dynamic multi-VDD, which is capable of dynamically switching between supply voltages in hardware submodules, simultaneously exploits both factors. Using the computation bypass framework and multiple supply voltages, we estimate data-dependent slack based on submodules that will be bypassed and exploit this slack by operating active submodules at a lower supply voltage. Our analysis of SPEC CPU2K benchmarks shows energy savings of up to 55% (and 46.53% on average) in functional units with minimal performance overheads
  • Keywords
    integrated circuit design; integrated memory circuits; logic design; microprocessor chips; computation bypass framework; data-dependent slack; datapath circuits; dynamic switching; energy consumption; energy optimization; hardware submodules; microprocessors; multiple supply voltages; scaling circuit; Circuits; Clocks; Delay; Design optimization; Energy consumption; Frequency; Hardware; Microprocessors; Timing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
  • Conference_Location
    Munich
  • Print_ISBN
    3-9810801-1-4
  • Type

    conf

  • DOI
    10.1109/DATE.2006.243897
  • Filename
    1657037