Title :
Classification Trees for Random Tests and Functional Coverage
Author :
Krupp, Alexander ; Mueller, Wolfgang
Author_Institution :
Paderborn Univ.
Abstract :
This article presents the classification tree method for functional verification to close the gap from the specification of a test plan to SystemVerilog (Chandra and Chakrabarty, 2001) test bench generation. Our method supports the systematic development of test configurations and is based on the classification tree method for embedded systems (CTM/ES) (Chakrabarty et al., 2000) extending CTM/ES for random test generation as well as for functional coverage and property specification
Keywords :
automatic test pattern generation; embedded systems; formal verification; hardware description languages; trees (mathematics); SystemVerilog; classification trees; embedded systems; functional coverage; functional verification; property specification; random test generation; test bench generation; Automatic testing; Automation; Classification tree analysis; Embedded system; Safety; System testing;
Conference_Titel :
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location :
Munich
Print_ISBN :
3-9810801-1-4
DOI :
10.1109/DATE.2006.243902
