DocumentCode
460943
Title
An automated exploration framework for FPGA-based soft multiprocessor systems
Author
Keutzer, Kurt ; Ravindran, Kaushik ; Satish, Nadathur ; Jin, Yujia
Author_Institution
University of California at Berkeley, CA
fYear
2005
fDate
Sept. 2005
Firstpage
273
Lastpage
278
Abstract
FPGA-based soft multiprocessors are viable system solutions for high performance applications. They provide a software abstraction to enable quick implementations on the FPGA. The multiprocessor can be customized for a target application to achieve high performance. Modern FPGAs provide the capacity to build a variety of micro-architectures composed of 20-50 processors, complex memory hierarchies, heterogeneous interconnection schemes and custom co-processors for performance critical operations. However, the diversity in the architectural design space makes it difficult to realize the performance potential of these systems. In this paper we develop an exploration framework to build efficient FPGA multiprocessors for a target application. Our main contribution is a tool based on Integer Linear Programming to explore micro-architectures and allocate application tasks to maximize throughput. Using this tool, we implement a soft multiprocessor for IPv4 packet forwarding that achieves a throughput of 2 Gbps, surpassing the performance of a carefully tuned hand design.
Keywords
Algorithm design and analysis; Application software; Coprocessors; Field programmable gate arrays; Integer linear programming; Logic programming; Multiprocessing systems; Permission; Space exploration; Throughput; FPGA; IPv4 packet forwarding; design space exploration; integer linear programming; soft multiprocessors;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis, 2005. CODES+ISSS '05. Third IEEE/ACM/IFIP International Conference on
Conference_Location
Jersey City, NJ, USA
Print_ISBN
1-59593-161-9
Type
conf
DOI
10.1145/1084834.1084903
Filename
4076349
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