• DocumentCode
    461618
  • Title

    Application Specific Processor Design For H.264 Baseline Profile Bit-Stream Decoding

  • Author

    Kun, Yang ; Chun, Zhang ; Zhihua, Wang

  • Author_Institution
    Dept. of EE, Tsinghua Univ., Beijing
  • Volume
    1
  • fYear
    2006
  • fDate
    16-20 2006
  • Abstract
    Bit stream coding plays an important role in image and video compressing standards. This paper presents a H.264 baseline profile bit-stream decoding solution based on application specific processor. The bit-stream decoder hardware is integrated into the RISC processor as a sub-module of its ALU. It can decode one symbol every clock cycle through one instruction, which is 50 times faster than tree-based software solution. The buffer module of the decoder has the ability of automatically maintaining the bit-stream. The design is fabricated in 0.18-mum CMOS process in UMC and can work at 100 MHz. The decoder hardware consists of 32 k transistors
  • Keywords
    CMOS digital integrated circuits; application specific integrated circuits; data compression; decoding; integrated circuit design; reduced instruction set computing; transistors; video coding; 100 MHz; ALU; CMOS process; H.264 baseline profile bit-stream decoding hardware; RISC processor; application specific processor design; buffer module; image compressing standards; transistors; tree-based software solution; video compressing standards; Application specific processors; CMOS process; Clocks; Decoding; Hardware; Image coding; Process design; Reduced instruction set computing; Streaming media; Video compression;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing, 2006 8th International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    0-7803-9736-3
  • Electronic_ISBN
    0-7803-9736-3
  • Type

    conf

  • DOI
    10.1109/ICOSP.2006.345487
  • Filename
    4128900