• DocumentCode
    46179
  • Title

    Tri-Mode Independent Gate FinFET-Based SRAM With Pass-Gate Feedback: Technology–Circuit Co-Design for Enhanced Cell Stability

  • Author

    Gupta, Suneet K. ; Kulkarni, Jaydeep P. ; Roy, Kaushik

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
  • Volume
    60
  • Issue
    11
  • fYear
    2013
  • fDate
    Nov. 2013
  • Firstpage
    3696
  • Lastpage
    3704
  • Abstract
    We present 6T SRAMs with pass-gate feedback using tri-mode independent gate (TMIG) FinFETs as the access transistors. We perform a comprehensive analysis of TMIG FinFETs and the proposed SRAM cell using our simulation framework, which is based on the non-equilibrium Green´s function models for FinFETs. We compare our technique with the tied gate (TG) FinFET SRAM and the previously proposed independent gate (IG) FinFET SRAM with pass-gate feedback. The effects of quantum confinement in scaled FinFETs on the device and SRAM characteristics are analyzed in detail. We show that quantum confinement effects lead to severe degradation in access time and write-ability of the IG FinFET SRAM. On the other hand, the SRAM cell proposed in this paper shows 14% improvement in write-ability over the TG FinFET SRAM with comparable read stability, achieving mitigation of the read-write conflict. At the same time, 30% reduction in standby leakage and comparable hold stability is achieved at no cell area penalty, with only 14% increase in the cell access time. We also show that the array-level issues associated with pass-gate feedback are mitigated using the co-design technique presented in this paper.
  • Keywords
    Green´s function methods; MOSFET; SRAM chips; circuit feedback; cell stability; hold stability; nonequilibrium Green function models; pass-gate feedback; quantum confinement effects; read stability; technology-circuit co-design; tri-mode independent gate FinFET-based SRAM; Capacitance; FinFETs; Logic gates; Mathematical model; Random access memory; Stability analysis; FinFET; SRAM; independent gate (IG); pass-gate feedback;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2013.2283235
  • Filename
    6626657