A Quantum Logic Circuit For Generating Fixed-Polarity Reed-Muller Coefficients

Author

Khan, Mozammel H A

Author_Institution

Dept. of Comput. Sci. & Eng., East West Univ., Dhaka

fYear

2006

fDate

19-21 Dec. 2006

Firstpage

141

Lastpage

144

Abstract

Logic function representation using fixed-polarity Reed-Muller (FPRM) expression has manifold advantages over classical SOP expression. Moreover, FPRM expression is a very useful representation for logic function realization using quantum logic circuits. In this paper, we present a quantum logic circuit for generating FPRM coefficients for a given polarity vector from the truth vector of the function

Keywords

Reed-Muller codes; quantum gates; FPRM expression; SOP expression; fixed-polarity Reed-Muller coefficients; logic function representation; quantum logic circuit; Arithmetic; Boolean functions; Circuit testing; Computer science; DH-HEMTs; Error correction; Logic circuits; Logic functions; Manifolds; Quantum computing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 2006. ICECE '06. International Conference on

Conference_Location

Dhaka

Print_ISBN

98432-3814-1

Type

conf

DOI

10.1109/ICECE.2006.355310

Filename

4178428

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=462283