DocumentCode
464684
Title
Using High Speed Shear and Cold Ball Pull to Characterize Lead Free Solder Alloys and Predict Board Level Drop Test Performance
Author
Johnson, Michael E. ; Lu, Henry Y. ; Lawhead, David ; Tessier, Ted ; Scott, Doug ; Curtis, Anthony
Author_Institution
Flip Chip Int., Phoenix
fYear
2007
fDate
May 29 2007-June 1 2007
Firstpage
536
Lastpage
542
Abstract
In recent years, coincidental with the increased use of LF solders, manufacturers of portable electronics devices such as cell phones have become increasingly aware of this issue. Increased emphasis has been placed on fine pitch array packages including flip chip (FC) and chip scale package (CSP) interconnects and their ability to withstand mechanical impact type events. An interconnect as defined herein is the solder bump and under bump metallurgy (UBM) structure combined, since both can have a significant effect on the mechanical strength of the overall interconnect structure. Various forms of mechanical impact tests have been designed to gauge the robustness of CSP interconnects to withstand mechanical impacts. Board level drop test (BLDT) is now in wide use as a standard reliability test requirement for many cell phone manufacturers. High speed shear (HSS) and high speed cold ball pull (HSCBP) are shown to be valuable tools in simulating/gauging BLDT performance. Samples are tested with HSS/HSCBP and then drop tested. Qualitative correlation between the HSS/HSCBP and drop tests is shown.
Keywords
chip scale packaging; fine-pitch technology; impact testing; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; mechanical strength; solders; board level drop test performance; bump metallurgy structure; chip scale package interconnects; cold ball pull test; electronic device interconnects; fine pitch array packages; flip chip interconnects; high speed shear test; lead free solder alloys characterization; mechanical impact test; mechanical strength; solder bump; standard reliability test requirements; Cellular phones; Chip scale packaging; Electronic equipment testing; Electronics packaging; Environmentally friendly manufacturing techniques; Flip chip; Inspection; Intermetallic; Lead; Materials testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2007. ECTC '07. Proceedings. 57th
Conference_Location
Reno, NV
ISSN
0569-5503
Print_ISBN
1-4244-0985-3
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2007.373848
Filename
4249934
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