Area Efficient Bus Encoding Technique for Minimizing Simultaneous Switching Noise (SSN)

Inductance effects cannot be neglected in circuits with higher operating frequencies. With shrinking technologies, as spacing between the interconnect lines decreases, simultaneous switching noise (SSN) or M*di/dt noise increases due to inductive coupling. The encoding techniques for minimizing crosstalk considering only RC effects are not suitable for RLC circuits. In this paper we propose a new bus encoding technique to minimize the simultaneous switching noise and delay in RLC interconnect lines. Hardware implementation details are given for encoder and decoder. Spice simulations are carried out for delay analysis on 2 mm and 5 mm interconnect lines at various technology nodes (130 nm, 90 nm and 65 nm). Proposed encoding scheme is tested with various SPEC´95 benchmarks and it is found that SSN is reduced by about 31% on an average compared to the un-encoded data