DocumentCode
465366
Title
A Robust Protocol for Concurrent On-Line Test (COLT) of NoC-based Systems-on-a-Chip
Author
Bhojwani, Praveen S. ; Mahapatra, Rabi N.
Author_Institution
Texas A&M Univ., College Station
fYear
2007
fDate
4-8 June 2007
Firstpage
670
Lastpage
675
Abstract
Concurrent on-line testing (COLT) of complex systems-on-a-chip (SoC) designs under lowering noise margins and degrading lifetimes of on-chip components, provides the ideal solution for the monitoring of system health while managing intrusion into executing applications. Deploying test infrastructure-IPs (TI-IPs) into designs has demonstrated the feasibility of using COLT in SoCs. Identifying potential hazards and ensuring correct operation of COLT is critical to providing reliable health monitoring. With the emergence of networks-on-a-chip (NoC) as communication infrastructures not only suitable for application related on-chip communication, but also test access mechanisms to on-chip cores, the experimental setup in this research, deploys TI-IP in a NoC environment and demonstrates TI-IP operation, its communication protocol specification and other related costs.
Keywords
condition monitoring; integrated circuit testing; network-on-chip; NoC; SoC; concurrent on-line test; health monitoring; networks-on-a-chip; on-chip components; system health; systems-on-a-chip; test infrastructure-IP; Degradation; Disaster management; Hazards; Life testing; Monitoring; Network-on-a-chip; Noise robustness; Protocols; System testing; System-on-a-chip; Concurrent on-line testing; Design; Management; Performance; Reliability; Verification; network-on-chip; robust protocol;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE
Conference_Location
San Diego, CA
ISSN
0738-100X
Print_ISBN
978-1-59593-627-1
Type
conf
Filename
4261268
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