DocumentCode
46579
Title
An Application-Tailored Approach to Hardware Cache Coherence
Author
Shriraman, A. ; Hongzhou Zhao ; Dwarkadas, Sandhya
Volume
46
Issue
10
fYear
2013
fDate
Oct-13
Firstpage
40
Lastpage
47
Abstract
Leveraging the computational power of the increasingly large core counts on a single chip requires scalable designs for cache coherence. The application-tailored approach eliminates redundancy in metadata storage and matches traffic to inherent application access and sharing behavior to allow scalability.
Keywords
cache storage; hardware cache coherence; metadata storage; scalable design; single chip; Cache management; Multicore processing; Program processors; Scability; Amoeba; Protozoa; SPACE; adaptive granularity; cache coherence; directory-based coherence; energy efficiency; memory hierarchy; sector caches; sub-block coherence;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/MC.2013.258
Filename
6562698
Link To Document