A Modular Suite for High-Definition Image Processor Co-Verification

High-end image processors are complex hardware and software systems. The verification of such devices poses a number of problems during the different phases of their life cycle. This paper proposes a modular verification suite that reuses the same test cases at every stage of the system´s life cycle. It uses models of increasing fidelity with a common set of verification tools to provide consistent verification coverage. Because of the feedback that can be provided by its modular design, the suite improves continuously and can be used to increase the verification coverage for future designs.