• DocumentCode
    472664
  • Title

    Deep Trench Well Isolation for 256Kb 6T CMOS Static RAM

  • Author

    Hashimoto, Kazuhiko ; Yokogawa, Shunji ; Kakumu, Masakazu ; Kinugawa, Kasaaki ; Sawada, Kazuhiro ; Sakurai, Takayasu ; Isobe, Mitsuo ; Matsunaga, Jun-Ichi ; Iizuka, Tetsuya ; Nagakubo, Yoshihide

  • Author_Institution
    Semiconductor Device Engineering Lab., Toshiba Corporation, Komukai-Toshiba-cho, Kawasaki, 210 Japan
  • fYear
    1985
  • fDate
    14-16 May 1985
  • Firstpage
    94
  • Lastpage
    95
  • Keywords
    CMOS integrated circuits; CMOS technology; Filling; Isolation technology; Leakage current; Read-write memory; Semiconductor devices; Stress; Substrates; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1985. Digest of Technical Papers. Symposium on
  • Conference_Location
    Kobe, Japan
  • Print_ISBN
    4-930813-09-3
  • Type

    conf

  • Filename
    4480320