DocumentCode :
472732
Title :
Very Thin Nitride/Oxide Composite Gate Insulator for VLSI CMOS
Author :
Dori, L. ; Sun, J. ; Arienzo, M. ; Basavaiah, S. ; Taur, Y. ; Zichermann, D.
Author_Institution :
IBM Thomas J. Watson Research Center P.O. Box 218 Yorktown Heights, NY 10598
fYear :
1987
fDate :
22-23 May 1987
Firstpage :
25
Lastpage :
26
Abstract :
We report, for the first time, excellent device characteristics of both n and p-channel (complementary) IGFETs with very thin nitride/oxide stacked gate insulators (10-14nm equivalent oxide thickness). The top nitride layer (as thin as 4nm) is effective in preventing boron penetration from the p+-poly gate to the channel. The threshold voltage instability and channel hot carrier effects are controlled by using (i) very thin top nitride (4nm), and (ii) complemetary gate work work functions, i.e., n+-poly for n-channel and p+-poly for p-channel IGFETs, respectively. Such composite insulators are very promising for submicron VLSI CMOS applications.
Keywords :
Boron; Dielectric breakdown; Electron traps; FETs; Hot carrier effects; Hot carriers; Insulation; Substrates; Threshold voltage; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 1987. Digest of Technical Papers. Symposium on
Conference_Location :
Karuizawa, Japan
Type :
conf
Filename :
4480404
Link To Document :
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