DocumentCode
472790
Title
Bipolar Technologies for High Speed VLSIs
Author
Nakamura, Hiroaki ; Sakai, Tetsushi
Author_Institution
Musashino Electrical Communication Laboratory 3-9-11, Midoricho, Musashinoshi, Tokyo, 180 Japan
fYear
1981
fDate
9-11 Sept. 1981
Firstpage
36
Lastpage
37
Keywords
Delay effects; Doping profiles; Electrodes; Fabrication; Frequency; Impurities; Parasitic capacitance; Stability; Temperature; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1981. Digest of Technical Papers. Symposium on
Conference_Location
Maui, HI, USA
Type
conf
Filename
4480513
Link To Document