DocumentCode :
472815
Title :
Fabrication of Si-MOS Fet Using NTD Si as Semi-Insulating Substrate
Author :
Ho, Vu Q. ; Sugano, Takuo
Author_Institution :
Department of Electronic Engineering the University of Tokyo 7-3-1 Hongo, Bunkyo-ku, Tokyo, Japan
fYear :
1981
fDate :
9-11 Sept. 1981
Firstpage :
84
Lastpage :
85
Keywords :
Annealing; Conductivity; FETs; Gold; Neutrons; Optical device fabrication; Optical pulses; Plasma applications; Plasma temperature; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 1981. Digest of Technical Papers. Symposium on
Conference_Location :
Maui, HI, USA
Type :
conf
Filename :
4480538
Link To Document :
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