Title :
A 1.1 NS Access Time 4 Kb Bipolar RAM Using Super Self-Aligned Technology
Author :
Miyanaga, H. ; Kobayashi, Y. ; Konaka, S. ; Yamamoto, Y. ; Sakai, T.
Author_Institution :
Atsugi Electrical Communication Laboratory, NTT 1839, Ono, Atsugi-shi, Kanagawa, Japan, 243-01
Keywords :
Circuits; Electrodes; Fabrication; Insulation; Metallization; Parasitic capacitance; Power dissipation; Random access memory; Read-write memory; Resistors;
Conference_Titel :
VLSI Technology, 1984. Digest of Technical Papers. Symposium on
Conference_Location :
San Diego, CA, USA
Print_ISBN :
4-930813-08-5
