Single Device Logic using 3D Gating of Screen Grid Field Effect Transistors

The screen grid field effect transistor (SGrFET) is an oxide-gated FET with a novel 3D gating configuration perpendicular to the current flow in the channel. The multiple gate character of the SGrFET lends itself perfectly to compact logic applications with a reduced number of devices per gate. In this report TCAD results of both DC and transient performance of double-gate row SGrFET logic are presented. The analysis of both the complementary and the all-n-type SGrFET inverter logic gives ps rise times and large noise margins up to 400 mV for IV supply. NAND, NOR and XOR logics can be obtained using only two n-type SGrFETs.