DocumentCode :
474556
Title :
Scan chain clustering for test power reduction
Author :
Elm, Melanie ; Wunderlich, Hans-Joachim ; Imhof, Michael E. ; Zoellin, Christian G. ; Leenstra, Jens ; Maeding, Nicolas
Author_Institution :
Inst. fuer Tech. Inf., Univ. Stuttgart, Stuttgart
fYear :
2008
fDate :
8-13 June 2008
Firstpage :
828
Lastpage :
833
Abstract :
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-flops into scan chains, which determines how many chains can be deactivated per pattern. In this paper, a new method to cluster flip-flops into scan chains is presented, which minimizes the power consumption during test. It is not dependent on a test set and can improve the performance of any test power reduction technique consequently. The approach does not specify any ordering inside the chains and fits seamlessly to any standard tool for scan chain integration. The application of known test power reduction techniques to the optimized scan chain configurations shows significant improvements for large industrial circuits.
Keywords :
flip-flops; integrated circuit testing; power consumption; power consumption; scan chain clustering; scan chain integration; scan flip-flops; test power reduction; Algorithm design and analysis; Automatic testing; Circuit testing; Cooling; Energy consumption; Flip-flops; Integrated circuit reliability; Permission; Switches; System testing; Design for Test; Low Power; Scan Design; Test;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE
Conference_Location :
Anaheim, CA
ISSN :
0738-100X
Print_ISBN :
978-1-60558-115-6
Type :
conf
Filename :
4555934
Link To Document :
بازگشت