Title :
High-throughput sketch update on a low-power stream processor
Author :
Lai, Yu-Kuen ; Byrd, Gregory T.
Author_Institution :
Dept. of Electr. Eng., Chung-Yuan Christian Univ., Chungli
Abstract :
Sketch algorithms are widely used for many networking applications, such as identifying frequent items, top-k flows, and traffic anomalies. This paper explores the implementation of the Count-Min sketch update using Indexed SRF accesses on a SIMD stream processor (Imagine). Both the sketch data structure and the packet stream are modeled as streams, and in-lane accesses to the stream register file (SRF) support concurrent updates without explicit synchronization. The 500-MHz stream processor is capable of supporting sketch update at 10 Gbps throughput for minimum- sized IP packets. This is nearly the same performance as the 1.4-GHz Intel IXP2800 (13 Gbps), using significantly less power (2.89 W vs. 21 W).
Keywords :
data structures; parallel algorithms; parallel architectures; parallel programming; pipeline processing; SIMD stream processor; bit rate 10 Gbit/s; frequency 500 MHz; high-throughput sketch update; imagine stream processor; indexed stream register file; low-power stream processor; minimum-sized IP packet; pipeline architecture; sketch data structure; Bandwidth; Computer architecture; Computer networks; Data processing; Data structures; Registers; Sampling methods; Streaming media; Telecommunication traffic; Throughput; SIMD; VLIW; data stream processing; network processors; sketch; stream architecture;
Conference_Titel :
Architecture for Networking and Communications systems, 2006. ANCS 2006. ACM/IEEE Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-59593-580-9