DocumentCode
475613
Title
Research on Node Coding and Routing Algorithm for Network on Chip
Author
Yang, Xiaoqiang ; Du, Huimin ; Han, Jungang
Author_Institution
Sch. of Microelectron., Xidian Univ., Xi´´an
Volume
1
fYear
2008
fDate
3-4 Aug. 2008
Firstpage
198
Lastpage
203
Abstract
Network topology and routing are key problems for the design of network on chip (NoC). The paper discusses how to choose suitable topology and node encoding scheme for NoC, and proposes a two-dimensional plane code based on Johnson Code by the combination of network topology with corresponding node coding. The node coding implies the relation between neighbouring nodes and their links and the global information of routing. Utilizing the code, the improved algorithm for X- Y routing is presented, which is implemented with only two or three logic operations in middle nodes. The experimental results show that the combination of the code proposed with Torus topology can simplify the routing algorithm in the implementation of NoC and significantly decrease signal latency and greatly improve communication performance.
Keywords
logic design; network routing; network topology; network-on-chip; Johnson Code; Torus topology; network on chip; network routing; network topology; node coding; relation between; Delay; Encoding; Hardware; Hypercubes; Network topology; Network-on-a-chip; Performance analysis; Reflective binary codes; Routing; Very large scale integration; Johnson Code; NoC; NoC Routing; Torus;
fLanguage
English
Publisher
ieee
Conference_Titel
Computing, Communication, Control, and Management, 2008. CCCM '08. ISECS International Colloquium on
Conference_Location
Guangzhou
Print_ISBN
978-0-7695-3290-5
Type
conf
DOI
10.1109/CCCM.2008.190
Filename
4609499
Link To Document