DocumentCode
477181
Title
A fast acquisition Phase Frequency Detector for phase-locked loops
Author
Fu, Zhongtao ; Wang, Xiao ; Minh, Eugene ; Apsel, Alyssa
Author_Institution
Electr. & Comput. Eng., Cornell Univ., Ithaca, NY
fYear
2008
fDate
18-19 Sept. 2008
Firstpage
77
Lastpage
80
Abstract
In this paper, we present a fast acquisition, ambiguity-free phase frequency detector (PFD) design. This PFD completely eliminates the missing edge and phase ambiguity problems found in many conventional PFDs. Therefore, this PFD topology speeds up the acquisition process and improves the maximum operating frequency. A fabricated PFD operating at 556 MHz along with a 6.5 GHz phase-locked loop design in 0.25 mum SOI process confirm such advantages.
Keywords
phase detectors; phase locked loops; SOI process; acquisition process; fast acquisition process; frequency 556 MHz; frequency 6.5 GHz; phase frequency detector; phase-locked loops; size 0.25 micron; Application software; Charge pumps; Clocks; Delay; Phase frequency detector; Phase locked loops; Signal generators; Topology; Voltage-controlled oscillators; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Micro-Nanoelectronics, Technology and Applications, 2008. EAMTA 2008. Argentine School of
Conference_Location
Buenos Aires
Print_ISBN
978-987-655-003-1
Electronic_ISBN
978-987-655-003-1
Type
conf
Filename
4638981
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