Common gate LNA design space exploration in all inversion regions

The design of CMOS CG-LNAs using a design space exploration proposed for all inversion regions, from weak to strong, is performed in this work. The exploration is done in terms of current consumption, gain and noise figure in the design space (I_D, gm/ID) showing the trade-offs of designing the CG-LNA in moderate or weak inversion. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900 MHz CG-LNA implemented in a 0.35 mum CMOS technology.