DocumentCode :
483295
Title :
VLD Design for AVS Video Decoder
Author :
Liu Wei ; Chen Yong-en
Author_Institution :
Commun. Software & ASIC Design Center, Tongji Univ., Shanghai
fYear :
2009
fDate :
23-25 Jan. 2009
Firstpage :
648
Lastpage :
651
Abstract :
In this paper, architecture with combination of software and hardware for AVS variable length code decoding is designed. Logical and feasible division between software and hardware for the system is presented. Under control of embedded CPU, the design can decode fixed length code, unsigned or signed k-th Exp-Golomb code and context-based adaptive2D-VLC (CA-2D-VLC) code. Furthermore, decoding flow of software is given in detail, which can output parsing results and command information in required format. A single module named "VLD" is designed in hardware to meet the requirement of being frequent transferred in CA-2D-VLC decoding. Finally, parsing results of the whole syntax elements from AVS bitstream are output on this platform correctly, which has been proved to support real-time decoding for AVS HDTV video. Though designed for AVS video standard originally, it can be adapted to other coding standards easily.
Keywords :
adaptive codes; decoding; embedded systems; high definition television; variable length codes; video coding; AVS video decoder; Exp-Golomb code; HDTV; VLD design; context-based adaptive 2D-VLC code; embedded CPU; fixed length code; variable length code decoding; Application specific integrated circuits; Communication system control; Computer architecture; Data mining; Decoding; Entropy coding; HDTV; Hardware; Software design; Video coding; AVS; c-program model; hardware; software; variable length code decoder;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Knowledge Discovery and Data Mining, 2009. WKDD 2009. Second International Workshop on
Conference_Location :
Moscow
Print_ISBN :
978-0-7695-3543-2
Type :
conf
DOI :
10.1109/WKDD.2009.128
Filename :
4772020
Link To Document :
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