Title :
LTR: A low-overhead and reliable routing algorithm for network on chips
Author :
Patooghy, A. ; Miremadi, S.G.
Author_Institution :
Comput. Eng. Dept., Sharif Univ. of Technol., Tehran
Abstract :
A fault tolerant routing algorithm is presented in this paper. The proposed routing algorithm is based on making a redundant copy of each packet as well as sending the redundant packets through the paths with low traffic loads. Since two copies of each packet reach the destination node, the erroneous packets are detected and replaced with the correct ones. To effectively use the paths with lower traffic loads, the redundant packets are routed according to YX routing while the original packets are routed according to Duato´s routing algorithm. Minimizing the number of sent redundant packets and exploiting different paths for sending the original and redundant packets enable the proposed algorithm to improve the reliability of NoCs with negligible power and performance overheads. VHDL simulations confirm that the proposed routing algorithm imposes lower power and performance overheads while providing almost the same reliability in comparison with flood-based routing algorithms.
Keywords :
fault tolerance; integrated circuit reliability; network routing; network-on-chip; Duato routing algorithm; LTR algorithm; YX routing; destination node; erroneous packets; fault tolerant routing algorithm; low-overhead routing; network-on-chips; redundant packets; reliability; traffic loads; Computer network reliability; Energy consumption; Error analysis; Fault tolerance; Floods; Network-on-a-chip; Redundancy; Routing; System recovery; Telecommunication traffic;
Conference_Titel :
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-2598-3
Electronic_ISBN :
978-1-4244-2599-0
DOI :
10.1109/SOCDC.2008.4815590
