DocumentCode
492882
Title
Embedded diagnosis and repairing of SoC memory
Author
Hahanov, Vladimir ; Litvinova, Eugenia ; Umerah, Ngene Christopher ; Guz, Olesya
Author_Institution
Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine
fYear
2009
fDate
24-28 Feb. 2009
Firstpage
296
Lastpage
300
Abstract
A method of optimal memory fault repair that differs from analogs by application of algebra-logical technology of fault covering by two-dimensional memory matrix topology is proposed. It enables to obtain minimal and full solutions for subsequent repair in real time, which is based on utilization of spares in the form of memory rows and columns.
Keywords
algebra; digital storage; network topology; system-on-chip; SoC memory; algebra-logical technology; embedded diagnosis; optimal memory fault; two-dimensional memory matrix topology; Cost function; Fault diagnosis; Hardware; Intellectual property; Minimization methods; Phase measurement; Pins; System testing; System-on-a-chip; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
CAD Systems in Microelectronics, 2009. CADSM 2009. 10th International Conference - The Experience of Designing and Application of
Conference_Location
Lviv-Polyana
Print_ISBN
978-966-2191-05-9
Type
conf
Filename
4839837
Link To Document