Title :
Device technology innovation for exascale computing
Author :
Chen, Tze-chiang T C
Author_Institution :
IBM Fellow, VP of Sci. & Technol., IBM T.J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
For the past 40 years, the scaling of CMOS device technology has enabled system performance to double every two years. However, emerging classes of applications for which network-speed processing and data-intensive modeling are integral components will demand a much faster rate of improvement, such as 2x/year in order to reach exaflop capabilities (100x-1000x over present systems) by the end of the next decade. These applications represent a significant growth opportunity and require continued innovation in silicon device scaling to increase intrinsic transistor performance/power and density. In addition, new system architectures will take advantage of 3D chip technology to enable a higher level of hybrid integration, new memory technology such as Phase Change Memory (PCM) will allow implementation of a new level of memory architecture, and silicon photonics on the processor will meet ultra-low power, low cost and high density communications needs. These and other innovations will lead to significant improvement in systems integration, performance, and power efficiency.
Keywords :
CMOS integrated circuits; memory architecture; phase change memories; CMOS device technology; device technology innovation; exascale computing; intrinsic transistor performance; memory architecture; phase change memory; silicon photonics; CMOS technology; Costs; Memory architecture; Phase change materials; Phase change memory; Photonics; Semiconductor device modeling; Silicon devices; System performance; Technological innovation;
Conference_Titel :
VLSI Technology, 2009 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-3308-7