DocumentCode :
497156
Title :
Multi-layered Vertical Gate NAND Flash overcoming stacking limit for terabit density storage
Author :
Kim, Wonjoo ; Choi, Sangmoo ; Sung, Junghun ; Lee, Taehee ; Park, Chulmin ; Ko, Hyoungsoo ; Jung, Juhwan ; Yoo, Inkyong ; Park, Yoondong
Author_Institution :
Device Archit. Lab., Samsung Electron. Co., Ltd., Yongin, South Korea
fYear :
2009
fDate :
16-18 June 2009
Firstpage :
188
Lastpage :
189
Abstract :
Vertical Gate NAND (VG-NAND) Flash array with multi-active layers has been successfully integrated for the first time. VG-NAND confirmed stable operations of program, body erase, and read. There is no aggravation on program disturbance with increased number of layers due to an architecture of VG-NAND with vertical blocks.
Keywords :
flash memories; logic gates; multi-active layers; terabit density storage; vertical blocks; vertical gate NAND flash; Decoding; Electric resistance; Fabrication; Immune system; Implants; Laboratories; Plugs; Research and development; Stacking; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2009 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-3308-7
Type :
conf
Filename :
5200593
Link To Document :
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