Title :
A 4.3GB/s mobile memory interface with power-efficient bandwidth scaling
Author :
Palmer, Robert ; Poulton, John ; Leibowitz, Brian ; Frans, Yohan ; Li, Simon ; Fuller, Andrew ; Eyles, John ; Wilson, John ; Aleksic, Marko ; Greer, Trey ; Bucher, Michael ; Nguyen, Nhat
Author_Institution :
Rambus Inc., 4440 El Camino Real, Los Altos, CA 94022, USA
Abstract :
A 4.3GB/s mobile memory interface built in TSMC 40nm LP CMOS uses burst transactions and low power states to enable power-efficient bandwidth scaling. A pausable clocking architecture enables fast power state transitions. The controller interface achieves 3.3mW/Gb/s power efficiency at 4.3GB/s data bandwidth, and supports better than 5mW/Gb/s operation over a range from 0.03 to 4.3GB/s.
Keywords :
Bandwidth; CMOS logic circuits; Clocks; Energy management; Memory management; Packaging; Phase locked loops; Power system management; Random access memory; Transceivers; I/O; low power; memory; power management;
Conference_Titel :
VLSI Circuits, 2009 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
978-1-4244-3307-0
Electronic_ISBN :
978-4-86348-001-8
